Log for the new hardware SID player xx/xx/98 - 9/19/98 ------------------ * Two previous failed SID players. First one worked but was very touchy and had way too many chips. * Second one never worked, and could never work. The datasheet that came with the 65C816 is horrendous. WDC should be ashamed for giving out such shitty "documentation" :-( * Built new hardware for the SID player. Fourth version of the hardware and it seems to work pretty good so far. * Roughed out some software to load in a tune and play it. * Added a VFD display to the thing. 9/19/98 ------- Wrote and linked in code to allow loading of songs off of the cart. Made said cart. 9/20/98 ------- * Fixed code so that now I can load all the songs on the cart. * Dorked with interrupt and loader. 9/21/98 ------- * Added hardware lockout to prevent bankswitch when loading data. * Fixed code to accept it. 9/22/98 ------- * Added support for on-the-fly CIA timer changes as well as on-the-fly VBI interrupt vector changes * Found out why 1986fabi wasn't working. It needs bit 0 of D019h set in order to run the music code. * Disabled interrupts thru the VIA when running init code and player code. Had to do this to prevent runaway interrupts. * Added in code to clear the RAM. Some tunes will not work properly unless this is done. 9/23/98 ------- * Added in the keypad and got code to read it working. * Currently, the above allows one to increment both song and tune #s * Fixed interrupt for VIC so now all songs work properly. 9/24/98 ------- * Added in a user interface! You can now view the songs, change the song, play it, stop it, "autoinc" to the next tune/song, and more. * Added a frequency counter that displays in Hz. (had to write a 32 bit divide for that!) * Figured out enough display commands to implement the above (turn the cursor off, position the cursor anywhere, etc) * Burned two more EPROMs o' tunez. 9/25/98 ------- * Tried out above tunes. * Some tunes use the lower part of 0100h, so I had to move the stack pointer up to 01ffh. This fixed about 20 non-working tunes. * Three tunes generate runaway interrupts; one fixed by turning off ints before playing tune, then turning them back on after finishing. * Cannot get several tunes working because they use some odd compression or something. (9 tunes) 10/1/98 ------- * Current player will not be adequate for all SID tunes, it must be re-designed. * Re-designed player on conceptual level. Using an FPGA now to get around future upgrade concerns. * Decided to add full SIDplay style complement of features. 10/3/98 ------- * Ordered an "instrument case", 16-key keypad, and another circuit board from Jameco. When these get here I can dry fit the cart port, board, keypad and VFD. 10/4/98 ------- * Figured out more info on how to make the SID player recognize the CIA timer for the tunes. You have to set the speed bits in the SID file! (note: these bits are supposed to be used for NTSC music speeds) 10/5/98 ------- * Designed a new oscillator. It will operate at both NTSC *and* PAL clock frequencies! (0.98Mhz and 1.02Mhz, PAL and NTSC resp.) Uses a PIC, 4046, and 4040. NTSC freq has 0% error while PAL freq has .01% error. (should be undetectable) Uses a single 3.57954Mhz crystal for all timing. Output switching is glitchless to prevent crashing of the machine and is PLL controlled. * Refined FPGA data loading and keypad reading. Added IR remote option. Keypad uses a PIC 16C84 for power control, keypad reading, and IR remote reading. This chip controls the power supply for the rest of the player and must be run on a seperate "standby" 5V supply. * Another PIC is being used to load the FPGA fusemap from an 8K*8 serial EEPROM, and to reset the processor. (the processor is held in reset while the fusemap is loaded, then taken out of reset to run). Both chips are 8 pins only. 10/7/98 ------- * PLL refined. Previous version has too much phase jitter. New version runs on a 14.318181Mhz oscillator can and divides by 128 instead of 512. The PLL now locks much faster and there is no detectable phase jitter in the output. The PIC apparently is happy. Note this is "PIC #1" 10/9/98 - 10/10/98 ------------------ * Got box, PCB, and keypad today. * Nibbled out hole for VFD. Board for same sits perfectly in slots moulded into the case! Bent/formed two aluminum pieces to hold VFD in place * Dremeled out hole for keypad, attached with screws. * Drilled holes for the IR detector & headphone jack, mounted same. * Drilled holes for the RCA jacks and power jack on back panel, mounted same. * Designed small aux. board that is screwed to the top of the case. Does: 1) Power supply 2) Power control (power on/off) 3) IR remote control decoding 4) Keypad matrix scanning and decoding 5) Volume control 6) Headphone/speaker amplification Note: this board houses PIC #2. * Built said board & tested. Working fine except keypad scanning & power control. (need to finish PIC code) * Built all required wiring harnesses & hooked everything up. 10/10/98 -------- * Finished PIC #2's code. * IR remote works properly. * Keypad works properly. * Power control works properly. * 3-wire data output to main board works properly. Bit order: xxTD BBBB x=not used T=toggle changes state when a button is pressed D=device 0=IR, 1=keypad B=button bits * When a button on the IR remote is pressed, it will repeat about twice a second- unless the power button is pressed, whereby it will only repeat once. (note that the power buttons will not cause a codeword to be sent. Only the power is affected.) 10/11/98 -------- * Did prelim hardware layout on board; routed power & ground and SIDs. 10/14/98 -------- * Finished routing wires on board. * Cut out hole in front for the cart 10/15/98 -------- * Attempted to get hardware working- FPGA installed and programmable; EPROM emulator working also. * Found out several things: * Soldering iron causes data to FPGA an EPROM emulator to become corrupt if it's thermostat turns on/off during a transfer. * A16-A23 do not like edge-triggered latching. I must now add an octal transparent latch chip to the board since my FPGA cannot perform this function. * Ground bounce isn't your friend! Had to add more caps to power busses to prevent problems (even though I have plenty of .1 and 10uf caps sprinkled liberally around the board.) * Got VFD display working properly. * Address decoding will work most likely once I get that octal latch installed. 10/16/98 -------- * Yes indeedey, the new 74ALS573 address latch works pretty spiffy. Damn WDC and their horrid documentation... I got bit by it once again. :-/ * Unit fits properly in the box and seems to work pretty nicely once the software was modified to work with the new hardware. * Volume control works now. 64 linear steps. 10/19/98 -------- * Functional testing all day. One song locked it up but this was because the song is buggy. * Changed volume to a logrythmic scale in 32 steps. 10/21/98 -------- * Got bankswitching working. * Added transparent ROM support (bankswitching is disabled until a tune accesses 1h). 10/22/98 -------- * Fixed all speed problems: * NTSC/PAL clock speeds now emulated * PAL clock speed is selected if the NTSC bits are set & timer written to * Real Time timer speed problem fixed; shows proper times in m:s.t format * Song frequencies are now calculated properly 10/27/98 -------- * Various emulation tweakings * Disassembled some tunes to see where they are crashing 10/29/98 -------- * Fixed a few more tunes so they wouldn't crash 11/01/98 -------- * Made up three more EPROMs o' tunez. 11/02/98 -------- * Fixed all crashing problems * Tunes crashed because of un-paired PLA's * Crashing because of RTI & BRK * Fixed all of the above by adding in a check to the IRQ routine. * If it has been run before, we have crashed out of the music code. This state is recoverable, and the machine recovers and continues to play the music. :-) * Tested 1400 tunes, only 15 are silent and 0 crash! * Fixed VFD writing problems- interrupt was hitting during write, causing problems. Added CLI/SEI pair to stop this. 11/04/98 -------- * Fixed all silent tune problems * Check bankswitch before running play code. If ROMs switched in over code to be executed, they are switched out before running code. * Removed un-neccessary STA's to EA31 etc. since they are now trapped by the above BRK catcher >:) * Only 4 non-working tunes left. I bet these are because of damaged code and/or invalid ops. * Did a little FPGA code cleanup 11/05/98 -------- * Worked on EEPROM/FPGA * Successfully programmed EEPROM using the on-board 65C816 and some port pins. * Had to do minor fixes to the board to allow this; added a pullup resistor to the SDA line and tied WPR to ground to allow writing to the upper quandrant of EEPROM * Wrote some PIC code (this is PIC #3) to read the EEPROM and stuff it into the FPGA. Slight problem is I need to reverse the data in the EEPROM so when I read it out I can stuff it right into the FPGA so it takes the least amount of time. * Made a q-n-d adaptor to accomodate testing of PIC code and loading of the FPGA contents. 11/06/98 -------- * Finished EEPROM/FPGA * Wrote data to EEPROM backwards to speed up readout * Pin 4 of a PIC12C509 is input only. :-( Had to re-do some stuff on my board to accomodate it. This includes adding a cap/resistor reset circuit onto both 12C509's (PIC #2 and #3) and adding a 4040 ripple counter to control reset of the main processor. * Got it all working inside the unit and on the board. 11/17/98 -------- * Added lots to FPGA: * Stereo channel splitting * Replacement of power-up timer * Replacement of divide by 128 for the PLL * Replacement of the 4094 serial to parallel converter for the keypad * Stereo SID Capability * None of the above tested yet. :-) * FPGA device at 93% of capacity... I cannot add too much more to this chip now. It is full. * Minor code cleaning 11/18/98 -------- * Fixed up FPGA stuff that was added and removed the chips whose functions were replaced. * Stereo channel splitting - seems to work fairly good (still needs help). * 4094 and divide by 128 work fine. * Reset timer cannot work in the FPGA due to power-up issues. Still working on this one. * FPGA code now at 95% of the device. Notes: I had a bear of a time shoe-horning the large 12 bit binary counter into the FPGA. Problem is there aren't enough asynch clocks to go around (2 per 10 macrocells) so that rules out ripple counters. Instead I used an XOR/AND synchronous counter as well as mixing it up with ripple counters :-) (i.e. if I had a macrocell left in one CFB I would make it a ripple counter). There are only 3 or so macrocells left and like 5 free pins. I would be hard-pressed to add anything else 11/19/98 -------- * Finished all hardware (apparently :-) and the stereo seperation seems to work fine; no fixing required. * Added rudimentary channel seperation controls. 3,6 and 9 control channels 1,2, and 3 resp. Each channel has four states- left, right, centre, and mute. Notes: Went clockwise on the unit for the time being. Won't work on it again for awhile. I want to give the new hardware/software a good burn-in and 20-30 hours of testing and all 1400 SID tunes again to make sure I didn't break anything. 11/20/98 -------- Major software featurefest! * Added volume indicator * Added numerical song entry. * Added automagic info show when song/tune is changed; reverts after 1 sec. * Moved buttons around a bit. * Added channel display when channel seperation is changed * Removed debug variables. 12/23/98 -------- Finishing touches * Finished software * Fixed all bugs * Added default tune that plays if no cart is installed * Added a mute circuit to get rid of start/stop pops * Added pause feature * Dressed wires inside unit so it looks nice Notes: Disaster struck! The 15V supply wire shorted out to the clock line and killed the FPGA, processor, and port chips! So I have a finished SID player that I cannot use until I get more parts. I need to call up WDC and see if they will send me more free samples. 1/22/99 ------- Got more free samples coming! A 65C816 and a 65C22 to replace the two that were destroyed. 1/26/99 ------- Final hardware fixes * Fixed mute circuit so it mutes quieter * Replaced reset circuit and got rid of another chip! Notes: Total of only 12 chips on the main board now. 2/1/99 ------ And I wait * Goddamn WDC still hasn't sent me the parts. I called them up today and got the standard corporate blowoff line when I asked for the status on them: "Oh, I'm sorry, the person you need to talk to is in a meeting." Yeah, right. Looks like this is one company's parts I will not ever use in any products. 2/4/99 ------ WDC sucks * I call up WDC today and ask where the chips are at. I get this lady who says "Well, we already sent you samples in august (6 months ago) and never heard anything back, so we aren't going to send you any more." I said: "Well, I can buy them." And she replies: "Well, we have a $100 minimum order!" in a really, really snotty tone. Their web page says they will waive the minimum order in certain cases... well I know someone's chips I'll *never* use again. 2/5/99 ------ Salvation * My friend messaged me on ICQ: "hey, guess what. I found you an old Apple 2 GS!" I couldn't belive it! I raced over there and picked it up. Upon opening the cover, the processor is immediately visible... socketed no less!! I take the chip out and pop it in the player. I needed a 65C22 also, since it was blown (couldn't tell for sure until I got the processor). I spied one on and old Mac board, but it was soldered down, with the silly pins cinched on the other side. I got out the blowtorch and had it desoldered in about 5 seconds flat. I bent the pins flat with pliers, cleaned off one pin of solder, and popped it in. I tentitively hit the power button... and it worked!!!!! The bastard is working once again! * Ugh oh, bug-a-boos: * Power-On reset circuit faulty: It works sometimes, but I've been having to reach inside the unit and tap the reset button for it to start :-( * The VFD is still having problems with missing instruction calls. Need to do: ----------- (in order of priority) * Implement 6 channel SIDplay tunes. * Make keypad buttons repeat when held down. Known bugs: ----------- * Some silent tunes yet... these are bad in some way and don't work on a real C64. * Still some very minor VFD fuckups... probably a timing loop error ^^ Appears to have been fixed... but I cannot tell since I couldn't run the code long enough due to the afore-mentioned blown chips.