Status: Fully traced out and processed. Schematic generated.
There are no EPROMs on this board.
Front of this board. (thanks to Lord Nightmare for the scan)
Back of this board. (thanks to Lord Nightmare for the scan)
Schematic of this board. (note: clicky for larger)
Interestingly, there is no buffer overrun protection. Even so, the "full" signal is tapped in between the two 64*12 FIFO sections to get a "buffer half full" flag that appears to be used for external flow control. I have not traced out the backplane board yet so I don't fully know where it goes or what it does.
To keep track of how many words are in the FIFO, two 74C193's are used to count the number of words present. Each word shifted into the FIFO will advance the counter by one, and each word used will subtract one. There is an 8 input NOR gate on the outputs of these counters to indicate the 0 condition, and thus the unit will stop speaking. This counter will cause a somewhat interesting bug to show up. If you send the stop command to the unit, it will get stuck in the FIFO somehow, since the counter and FIFO get out of whack. There is probably a way to reset it, but I haven't determined how just yet.
The FIFO board appears to control the speech hardware, sending it data when the "speak" line is toggled, and it will keep clocking out words when requested until the counter gets to 0.
There are some tristate buffers on the outputs of the FIFO, which I assume allows one to disable them, so that the keyboard device (if plugged in) can access the speech hardware directly. This is only a guess, however.